EOTPR Fine Pitch Probing for Die-to-Die Interconnect Failure Analysis

By Bernice Zee ¹, Wen Qiu ¹, Aaron Wai Ken Lee ¹, Jesse Alton ², Thomas White ², David Kim ², Martin Igarashi ^2
1 Advanced Micro Devices (Singapore) Pte Ltd, Singapore
² TeraView Limited, United Kingdom

Abstract

Debug and physical failure analysis (PFA) of heterogeneously integrated semiconductor packages, particularly die-to-die (D2D) input/output (I/O) type fails, has become very challenging due to the lack of direct access to the I/Os from the package substrate to do static open/shorts fault isolation and limited test program granularity to determine which location along the D2D interconnect trace is failing. Thus, a suitable electrical fault isolation technique is required to ensure high success rate for root cause analysis. This paper discusses how EOTPR is used to isolate defects on a D2D interconnect trace of a chiplet advanced packaging using local silicon bridge with reasonable accuracy. Minimal sample preparation was needed to expose the I/O bumps for probing, thus minimizing the risk of artifacts that may cause the defect to be lost. A case study will demonstrate the successful application of the technique.

Keywords: chiplet packaging, die-to-die interconnect failure analysis, electrical fault isolation, electro-optical terahertz pulse reflectometry fine pitch probing, heterogeneous integration, physical failure analysis, sample preparation, silicon bridge

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