What could back an open market for chiplets?
By Chris Edwards, New Electronics | November 18, 2025
For as long as the idea of the system-on-chip (SoC) has existed, the graphs of design and non-recurrent engineering costs have been reliably exponential in the wrong direction. Each successive process node just pushes the number even further into the stratosphere. The payoff was, naturally, you get more for your money in terms of silicon capability with each notch of the ratchet.
Then, even silicon became more expensive on a per-transistor basis. Not by much, but it deviated from the long-term trend of Moore’s Law. At the International Electron Device Meeting in 2023, Google chip-packaging chief Milind Shah placed the switch at 20nm, just ahead of the foundries’ move to finFETs.
Chipmakers companies like AMD could see this problem coming and began, as the finFET generations appeared, the move to chiplets. Dividing a large, all-encompassing SoC into multiple chiplets makes it possible to dedicate the most advanced silicon to the circuits that can take best advantage. For AMD, those were the x86 cores in its high-end processors. The I/O and memory controllers? Those can use more mature, more analogue-friendly and cheaper process nodes.
To read the full article, click here
Related Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
- Near-Packaged Optics (NPO) Chiplet Solution
- High Performance Droplet
- Interconnect Chiplet
Related News
- YorChip announces Universal PHY™ PPA and introduces Open PHY to jumpstart broader market
- Avnet ASIC and Bar-Ilan University Launch Innovation Center for Next Generation Chiplets
- Lightmatter Announces Reference Architecture Initiative with Industry Leaders in the Open Compute Project for Co-Packaged Optics
- Chiplets Market to Reach USD 107.0 Billion by 2033; Amid Rising Demand for Advanced Semiconductor Solutions
Latest News
- AI Optical Interconnect Boom Drives U.S. Firms to Expand Southeast Asia Outsourcing, Opening the Door for Cross-Industry Entrants
- GlobalFoundries accelerates adoption of co-packaged optics for advanced AI data centers with SCALE optical module solution
- TSMC SoIC roadmap targets 2029 chip stacking
- Applied Materials Broadens Advanced Packaging Portfolio with Acquisition of NEXX
- AI Competition Turns into a Supply Chain Arms Race, Tightening Advanced Packaging and 3nm Capacity