Vertical Compute raises €57M to solve the AI memory bottleneck with new high density memory
Louvain-la-Neuve (Belgium) -- March 4, 2026 - Vertical Compute has raised €57 million to unlock the memory bottleneck in AI amid a global shortage of high density memory. Vertical Compute secured an additional €37 million following an earlier raise of €20 million to bring its seed round to €57 million. In just over a year, the team at Vertical Compute has successfully taped-out the company’s first test chip, integrating vertical memory stacks directly on compute logic within a single 300mm wafer manufacturing process flow — a key technical validation milestone.
Quantonation led the seed round, with participation from Flanders Future Techfund (managed by the Flemish investment company PMV), Wallonie Entreprendre, Sambrinvest, Noshaq, InvestBW, Drysdale Ventures and Kima Ventures. Existing investors Eurazeo, XAnge, Vector Gestion, imec.xpand and imec also reinvested in this round, underscoring their continued confidence in the company’s roadmap. In addition, Vertical Compute secured non-dilutive funding from Flanders´s VLAIO and BPI France, included in the total financing package.
The vertical shift to solve the memory bottleneck
AI is advancing at unprecedented speed, but its infrastructure is approaching systemic limits. Compute architectures built on legacy 2D memory arrays are struggling to keep pace. The resulting memory bottleneck, combined with global constraints in advanced memory supply, are driving rising costs, soaring energy consumption and increasing concentration of AI capabilities in a handful of hyperscale data centers.
“Over the coming years, supply constraints on semiconductors and memories, escalating AI infrastructure costs and energy demands will intensify tensions across industries and territories and threaten the long-term accessibility of AI beyond a limited number of dominant players. What many still describe as a ‘memory wall’ is in fact a much broader industrial turning point ”, said Sylvain Dubois, co-founder & CEO of Vertical Compute.
Vertical Compute removes this bottleneck by integrating memory directly above compute logic within a single wafer manufacturing process, reducing data movement from centimeters to nanometers. This disruptive 3D approach fundamentally changes how data flows inside a chip. By stacking vertical memory elements directly on top of logic, Vertical Compute minimizes latency, drastically cuts energy consumption and eliminates the inherent inefficiencies of traditional 2D memory architectures.
Delivered through a chiplet-based approach, the technology is designed to integrate seamlessly into existing processor architectures. Rather than replacing compute cores, Vertical Compute acts as an enabling layer — enhancing CPUs, GPUs and custom AI accelerators with dramatically higher memory density and bandwidth.
“The impact is fundamental. Being able to store data vertically is like using a skyscraper instead of a single story home to house people: orders of magnitudes more people (data) and much closer commute to work - just take the elevator down! In practice, this redefines the size and power envelope required to run agentic and physical AI models with a first key unlock being on-device low power context generation use cases.”, explains Sébastien Couet, co-founder & CTO of Vertical Compute.
In just over a year after spinning out of imec, Vertical Compute has grown to 25 people, successfully taped out its first vertically integrated memory-on-logic test chip, and is now using the new seed funding to shift from validation to commercial chiplet deployment for next-gen AI platforms.
To better understand how Vertical Integrated Memory works and how it integrates into existing processor designs, watch the explanatory video below.
Backed by leading deep-tech investors
Vertical Compute’s growth is supported by a coalition of international deep-tech investors with strong expertise in semiconductors, advanced materials and next-generation technologies. Their continued commitment reflects confidence in both the team’s execution and the strategic importance of next-generation AI memory systems.
“As AI scales in a generationally significant buildout, the bottleneck isn’t just compute, it’s memory and how densely we can pack it. Vertical Compute is attacking that head-on with a breakthrough high density memory architecture that’s already proving it can scale. ”, says Will Zeng, Partner at Quantonation.
“As an imec spin-off, Vertical Compute brings together world-class scientific excellence and a remarkable capacity to execute. We are convinced that this combination creates a powerful bridge from frontier research to meaningful industrial transformation”, says Tom Vanhoutte, Managing Partner at imec.xpand.
“The acceleration of AI demands paradigm-level innovation at the hardware level. Vertical Compute offers a compelling answer to this challenge and a credible pathway to broad adoption across the AI ecosystem”, says Thomas Turelier, Partner at Eurazeo.
“We believe this technology can unlock a new phase of growth for AI systems, from hyperscale data centers to edge environments. The company is building a critical enabling layer for the ecosystem. As an imec spin-off, Vertical Compute builds on decades of world-class semiconductor research rooted in Flanders — now positioned to address a global infrastructure challenge.”, says Vincent Hebbelynck, Head of Tech VC at PMV, managing FFTF.
“AI’s future depends on rethinking its hardware foundations. Vertical Compute is building one of the most compelling architectural shifts we’ve seen in years. We’re excited to back the team as they move from validation to large-scale industrial deployment.”, says Guilhem de Vregille, Partner at XAnge.
About the founders
Sylvain Dubois is a deep-tech entrepreneur and business executive with over 25 years of experience in compute and memory technologies. Throughout his career, including roles within leading global technology companies such as Google, he has worked at the intersection of large-scale infrastructure and advanced semiconductor innovation. His long-standing focus on the memory bottleneck in modern computing ultimately led to the creation of Vertical Compute.
Sebastien Couet is a semiconductor R&D leader with over a decade of experience at imec, the world-leading R&D and innovation hub in nanoelectronics and digital technologies. He has been deeply involved in next-generation memory roadmaps and advanced 3D integration research, contributing to the development of new architectural approaches to overcome the limitations of conventional memory hierarchies. He invented the Vertical Integrated Memory concept at the Core of Vertical Compute’s technology during his tenure at Imec.
About Vertical Compute
Vertical Compute (www.verticalcompute.com) is a European deep tech startup focused on developing a game-changing vertically integrated memory technology. Founded in 2024, the company aims to address both the memory bottleneck in compute architectures and the growing constraints in advanced memory supply, unlocking the full potential of data-intensive applications. With a team of 25 across Belgium and France, Vertical Compute combines deep semiconductor expertise with a strong execution focus. With a strong leadership team and a clear vision, Vertical Compute is set to reinvent the future of computing.
Our investors (by alphabetical order)
- Drysdale Ventures
- Encore Issuances
- Eurazeo
- Flanders Future Techfund (managed by the Flemish investment company PMV)
- InvestBW
- Imec
- Imec.xpand
- Kima Ventures
- Noshaq
- Quantonation
- Sambrinvest
- Wallonie Entreprendre
- XAnge
Related Chiplet
- DPIQ Tx PICs
- IMDD Tx PICs
- Near-Packaged Optics (NPO) Chiplet Solution
- High Performance Droplet
- Interconnect Chiplet
Related News
- Vertical Compute, a new imec spin-off, raises €20 million to Revolutionize the Future of AI Computing
- JEDEC and Open Compute Project Foundation Pave the Way for a New Era of Chiplet Innovation
- Alphawave Semi Elevates Chiplet-Powered Silicon Platforms for AI Compute through Arm Total Design
- Eliyan Closes $40M Series A Funding Round and Unveils Industry’s Highest Performance Chiplet Interconnect Technologies
Latest News
- Vertical Compute raises €57M to solve the AI memory bottleneck with new high density memory
- Ayar Labs Closes $500M Series E, Accelerates Volume Production of Co-Packaged Optics
- NanoIC opens access to first-ever fine-pitch RDL and D2W hybrid bonding interconnect PDKs
- GUC Announces Tape-out of UCIe 64G IP on TSMC N3P Technology
- GLS and APES Announce Advanced Semiconductor Packaging Partnership