Mastering multi-physics effects in 3D IC design
By Todd Burkholder, Tarek Ramadhan and John Ferguson, Siemens EDA
EDN | November 10, 2025
The semiconductor industry is at a pivotal moment as the limits of Moore’s Law motivate a transition to three-dimensional integrated circuit (3D IC) technology. By vertically integrating multiple chiplets, 3D ICs enable advances in performance, functionality, and power efficiency. However, stacking dies introduces layers of complexity driven by multi-physics interactions—thermal, mechanical, and electrical—which must be addressed at the start of design.
This shift from two-dimensional (2D) system-on-chips (SoC) to stacked 3D ICs fundamentally alters the design environment. 2D SoCs benefit from well-established process design kits (PDKs) and predictable workflows.
In contrast, 3D integration often means combining heterogeneous dies that use different process nodes and new interconnection technologies, presenting additional variables throughout the design and verification flow. Multi-physics phenomena are no longer isolated concerns—they are integral to the design’s overall success.
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